# Specifications and Interfaces

Cyan EC is a high channel count, ultra wide band, high gain, direct conversion quadrature transceiver and signal processing platform. Providing simultaneous support for up 64 DSP channels using up to 16, fully independent, transmit or receive radio channels, this flexible platform uses four 40GBASE-R qSFP ports to quickly receive and transmit radio data. With a standard instantaneous bandwidth of 1GHz (upgradable to 3GHz using our high bandwidth option), 16 bit converter resolution, and a tunable RF range between 100kHz to 20GHz, Cyan EC aims to provide end users with the best possible performance available from a commercial vendor. Cyan EC is compatible with various signal processing tool kits, including GNU Radio and includes source code for many of its drivers and peripherals.

Note

Cyan EC is capable of Digital Down/Up Conversion, so superhet architectures can be implemented using Digital Down/Up Conversion on the FPGA.

## Absolute Maximum Ratings

Stresses beyond those listed in the Absolute Ratings Table 1 may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of the product at these conditions is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and is, therefore, not recommended.

Warning

EXCEEDING ABSOLUTE RATINGS MAY DAMAGE DEVICE AND MAY CAUSE DANGEROUS FIRE OR ELECTRICAL HAZARDS Exceeding these ratings may substantially damage device, and the resulting hazards may cause serious personal injury or death.

Table 1: Absolute Ratings: Exposure or sustained operation at absolute ratings may permanently damage Cyan EC. Ensure fan inlets (located on both sides of the device) are not blocked during operation.

Specifications Min Max Units Notes
Operating Temperature 5 40 C At fan inlet
Operating Humidity 5 100 % Non-Condensing
Storage Temperature 0 40 C
Storage Humidity 20 95 % Non-Condensing
Input RF Power 10 dBm Do not exceed.
IO and TRIG Voltage 1.8 V Do not exceed: Direct to FPGA.
External Reference 3 Vpp Do not exceed.
SMA Torque 0.6 0.7 Nm

## Specifications

Cyan EC is a very flexible radio and signal processing platform that supports high bandwidth communications over a wide tuning range. Specific performance figures are provided as an appendix to this manual; for specific measurements, please contact Per Vices.

To provide a general idea of what this product is capable of, Table 2 lists some conservative figures of its out-of-box performance. Configuration of the product towards a specific application may see some of these figures exceed at the expense of others. For more information, please do not hesitate to contact us.

Table 2: Calibration Measurements relative to 20˚C

Specification Min Nom Max Units
Common Radio RF Stage (LMX2595) 0.5 20 GHz
Baseband Stage 0.1 500 MHz
Dynamic Range 25 70 dB
SFDR 65 dB
Noise Figure, Rx RF St 3.1 7 dB
Power Gain Low 15 45 dB
Power Gain High -10 65 dB
Group Delay (Radio Chain)$^{1}$ Low TBD ns
Group Delay (Radio Chain)$^{1}$ High TBD ns
Radio Channels Independent Rx/Tx Channels$^{2}$ 16 -
DSP channels$^{4}$ 64 -
(Receive Converter) ADC resolution$^{3}$ 12 16 bits
ADC Sample Rate$^{3}$ 1 325 GSPS
Rx Sampling Bandwidth 1 GHz
Latency (input to serial)$^{1}$ TBD ns
Receive DSP and FPGA Specs (default Firmware) Decimation $\left(\frac{f_{s}}{n}\right)$ 1 65534 -
Latency (FPGA DSP)$^{1}$ TBD ns
Transmit Radio Transmit Power Low -10 18 dBm
Transmit Power High dBm
Group Delay (radio chain)$^{1}$ Low TBD ns
Group Delay (radio chain)$^{1}$ High TBD ns
DAC (Transmit Converter) Tx Output Bandwidth$^3$ 1 GHz
DAC resolution 16 bits
DAC Output Bandwidth 6 GSPS
Latency (serial to output)$^{1}$ TBD ns
Transmit DSP and FPGA Interpolation ($n\cdot f_{s}$) 1 65534 -
Specifications Latency (FPGA DSP)$^{1}$ TBD ns
Digital FPGA - Stratix 10 SOC 1SX280HU3F50 -
On Board Processor Core ARM Cortex-A53 -
HPS RAM (DDR4) 16 Gb
FPGA RAM (DDR4, x2) 64 Gb
NAND Flash (x8) 4 Gb
Networking 40GBASE-R, Data$^{2}$ x4(each) 40 Gbps
100BASE-T, Management x2 (each) 1 Gbps
Int. Reference (10MHz) Frequency Stability -5 5 ppb
Ext. Reference (10MHz) Input Voltage Swing 2.5 3 Vpp
IO, PPS, and TRIG FPGA IO Voltage Range 0 1.6 V

$^{1}$For additional information on latency, please contact us.

$^{2}$Default product contains 8 Rx and 8 Tx channels, but may be customized to support an arbitrary number of Rx or Tx channels.

$^{3}$Default product contains 1GSPS convertor with 16bit resolution. High bandwidth variant supports 3GSPS converter with 12 bit resolution.

$^{4}$For 50MSPS channels, we can support up to 32 (2 per physical SMA). For 25MSPS channels, we can support up to 64 DSP chains (4 per physical SMA).

## External Interfaces

Cyan EC has a number of user accessible interfaces through which the device can connect to external sources and sinks. Management functions are carried out over a web page hosted by the Cyan EC transceiver and accessible using the Management Ethernet port on the front face of the device. Data is sent over the 40Gbps qSFP ports and receive and transmit antennas connect to the SMA connectors on the front of the device. Other peripherals ports provide access or the capability to improve functionality.

• 1Gbps Management Port Dual management ports connect to the on-board HPS, located on the FPGA silicon, and provide a unified interface by which to control and configure the platform.

• 40GBASE-R qSFP There are four qSFP ports on the front panel of the device that use 40GBASE-R encoding to directly communicate with an optical module and interface with a ten gigabit network. These ports directly interface with the FPGA fabric and support high bandwidth, low latency communication between the ADCs and DACs.

• 50$\Omega$ SMA There are sixteen standard SMA radio headers the front of the unit. These are used to connect to external antennas, sinks, or sources, including:

channels count description
Rx 8 The eight independent receive channels may be connected to external sources or antennas, each supporting up to 4 DSP channels per physical channel
Tx 8 The eight independent transmit channels may be connected to external antennas or sinks, each supporting up to 4 DSP channels per physical channel
• USB 2.0 A USB port connects to the Linux system running on the Hard Processor System.

• Micro-SD Slot The FPGA and Hard Processor System may be rebooted or configured using an external Micro-SD card.
• Debug Mini-DSUB The debug port provides JTAG access, and allows for the complete configuration of the unit.
• IEC320 C14 Power A standard «computer» cable plugs into this connector to power the unit. The power supply accepts 120V or 240V.

## Operating System

Although Cyan EC may be used with any operating system, we strongly recommend using a Linux operating system. This ensures you will be able to take advantage of a very large body of high performance that exists to support high performance computing applications, while also providing a more comprehensive development environment. It will also allow users to more easily use our existing example code, and also provides for a higher performance computing environment. It is also possible to SSH into the small Linux distribution running on the on-board processor.

## Network Interface Card (NIC) Requirements

Cyan EC uses a 40-gigabit Ethernet connection to quickly send and receive data. The following network cards have been tested for compatibility with Cyan EC;

Manufacturer Model
Mellanox Technologies MT27800 Family [ConnectX-5]

## Optical Fiber Requirements

Cyan EC requires active optical cabling: Cyan EC can ship with high quality, qSFP cabling (AOC) that uses OM-1 type optical fiber (kit option). We suggest using Optical Multimode (OM) grade fiber (ie. OM1, OM2, OM3, or OM4). In a production environment, or when integrating the product into existing infrastructure, you may use legacy FDDI grade fiber for short runs, though we advise testing worst-case performance across the longest run prior to wide scale deployment.

Figure 1: We sugget using optical multimode (OM) grade fiber

Figure 2: This is the transceiver module that gets hooked up to the end of the Optical Fiber cable